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Revision as of 07:02, 11 December 2006

Lets Discuss on this page the important questions, jot down our thoughts, divide the work & post Minutes of meetings.

Ameet, Rathna, Abhijeet & Achintya met yesterday.

ToDo:

Rathna & Abhijeet to work on finding cause of inefficiency in UIUC design. This will try to do pspice simulation of UIUC circuit, to check if the simulated efficiency was itself low. They will also study the datasheet of the MOSFET used, and if its switching losses can explain the inefficiency. Pspice student version is free, but has freq limitations, and limited part library, which can halt the progress.
Both Rathna & Abhijeet has friends in Power Electronics industry. They will inquire the feasibility of such our design, and how to go about building it.
Achintya is studying converters and various types. He is also studying Hugh Piggot's plans. Achintya, could you work on determining if the conduction losses before the converter stage will increase/decrease by stepping up the voltage?
Abhijeet will try to get hold of pspice/similar license once Himanshu is back.
Ameet will try to understand the existing circuit, and how can it be modified for higher voltage application, by consulting with Rahul Kodkani. Also to mail all relevent links, to the team. Construct webpage on Udai for this effort. (creating this wiki instead)

Discussion

Questions we faced are listed on Q&A page
We figured from very rough calculations that around 70% efficient converter is needed to match efficiencies of current system operating at 48V without the converter, which has 20W input side conduction losses.
MOSFET's switching losses depend on switching freq, which is PWM frequency. Its conduction losses are negligible.
Too many Diodes in the circuit. What is the need? Diode reverse conduction losses negligible in schottky diode. What explains the converter losses then?

Next Meeting Monday evening 5pm.

Right now key questions to answer are (lets append the answers alongwith as we find them)

what is cause of low efficiencies in UIUC design. Is that MOSFET? poor design? could they not catch it in pspice simulation they carried out before the design?
Are there theoretical benefits of higher voltage? There are conflicting opinions on this, as Hugh Piggot thinks R will increase as square of voltage, nullifying the benefits, while some others think it is good idea. Can we analyze this more carefully to get a final answer?

Some not so key questions are

saurabh: why not do ac-ac stepdown by transformer? more losses?
ameet: what is Michael using currently to down convert 48V to 12V? I did not see any converter in the schematic. I just saw charge controller for one of the batteries. Rest of 4 batteries were connected in series tto make 48V.
ameet:How does generator voltage stay constant at 48V? does it not fluctuate with wind speed? Answer should lie in Hugh's Wind Turbine handbook.
rathna: what efficiencies will make the converter more attractive than current setup?e.g. If we are saving 15W in input side losses, and lose those in converter losses, we better not use it :-)

Use this to jot down your thoughts/comments/suggestions along with your Name.